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[source in ebook] mt48lc4m32b2

Description: mt48lc4m32b2.v 是128M sdram 中典型设计。。可以借鉴。-mt48lc4m32b2.v 128M sdram is typical design. . Be used.
Platform: | Size: 8192 | Author: chenliang | Hits:

[VHDL-FPGA-Verilog] CommandResponse

Description: verilog语言写的sdram控制器—命令响应模块代码，经过测试，逻辑正确，可编译，可综合-verilog language written sdram controller-order response to the code, tested, logically correct, compiler, integrated
Platform: | Size: 1024 | Author: hanjian | Hits:

[VHDL-FPGA-Verilog] sdr_data_path

Description: SDRAM控制器Verilog员代码，数据链路模块，完成和顶层模块的数据交换-SDRAM controller member Verilog code, data link module, Top module completed and the data exchange
Platform: | Size: 2048 | Author: 陈建勇 | Hits:

[VHDL-FPGA-Verilog] control_interface

Description: SDRAM控制器Verilog员代码，控制接口模块，完成和顶层模块的控制命令的传递-SDRAM controller member Verilog code control interface module, Top module and complete the transfer of control orders
Platform: | Size: 3072 | Author: 陈建勇 | Hits:

[VHDL-FPGA-Verilog] Commandinterface

Description: SDRAM控制器Verilog员代码，命令生成模块，完成SDRAM控制接口命令的生成-SDRAM controller member Verilog code, order generation module, SDRAM interface complete control orders Generation
Platform: | Size: 7168 | Author: 陈建勇 | Hits:

[VHDL-FPGA-Verilog] Sdram_Control_4Port

Description: ALTERA 的关于对SDRAM控制器操作的verilog相关程序，很不错绝对值得借鉴。-ALTERA on the operation of the SDRAM controller Verilog procedures, it is definitely worth a good draw.
Platform: | Size: 13312 | Author: 邹振兴 | Hits:

[VHDL-FPGA-Verilog] SDR_4Mx16_HY57V641620HG_verilogl

Description: Hynix公司8M byte sdr sdram的verilog语言仿真实现。-Hynix company 8M byte sdr sdram realize the Verilog simulation language.
Platform: | Size: 105472 | Author: 张力 | Hits:

[MPI] sdram_verilog_lattice

Description: 已经成功的FPGA 控制的SDRAM控制器代码.只要修改你需要的宽度就可以了.-FPGA has been successfully controlled by SDRAM controller code. As long as you need to modify the width of it.
Platform: | Size: 187392 | Author: chen qiming | Hits:

[VHDL-FPGA-Verilog] sdram_controller

Description: sdram控制器，经过时序仿真，功能正确-SDRAM controller, after timing simulation, the correct function
Platform: | Size: 31744 | Author: 雷峰成 | Hits:

[ARM-PowerPC-ColdFire-MIPS] mem_ctrl.tar

Description: verilog 写的 memory controller ，可以控制SDRAM SRAM NOR -written in Verilog memory controller, can control SDRAM SRAM NOR
Platform: | Size: 331776 | Author: youjia | Hits:

[VHDL-FPGA-Verilog] sdram

Description: sdram controller.verilog
Platform: | Size: 13312 | Author: 刘志刚 | Hits:

[VHDL-FPGA-Verilog] xapp134_vhdl

Description: The SDRAM controller is designed for the Virtex V300bg432-6. It s simulated with Micron SDRAM models. The design is verified with timing constraints at 115 MHZ.-err
Platform: | Size: 2628608 | Author: ronsullivan | Hits:

[Software Engineering] DDR_SDRAM_controller_verilog

Description: DDR SRAM控制器的verilog完整设计文档（包含有完整的verilog源代码），-DDR SRAM controller complete Verilog design documents (including a complete Verilog source code),
Platform: | Size: 475136 | Author: lipengfei | Hits:

[Other] SDRAM-HY57V641620

Description: 动态随即存储器的时序和工作原理，剖析了其运行的状态机，对底层程序开发有帮助（例子是关于HY57V641620）-Then the dynamic memory timing and working principle, analyzes the state machine its running on the bottom of program development helpful (example is the HY57V641620)
Platform: | Size: 432128 | Author: hlc | Hits:

[VHDL-FPGA-Verilog] DDR_SDRAM_verilog

Description: DDR（双速率）SDRAM控制器参考设计verilog代码，可以直接用的，很好的-DDR (double rate) SDRAM controller reference design Verilog code, can be directly used, very good
Platform: | Size: 752640 | Author: 宋珂 | Hits:

[VHDL-FPGA-Verilog] ddr2sdram_spartan3s700an.tar

Description: It is a first time code being developed to designers who want to get your DDR2 SDRAM on-board in Spartan 3AN Starter Kit - Diligent fully working.-It is a first time code being developed to designers who want to get your DDR2 SDRAM on-board in Spartan 3AN Starter Kit- Diligent fully working.
Platform: | Size: 1488896 | Author: under | Hits:

[VHDL-FPGA-Verilog] Micron_SDRAM_DDR2Simulation_model_Verilog

Description: DDR2 SDRAM仿真模型，适合于ModelSim下工作，请先阅读readme-DDR2 SDRAM Simulation Model which is suitable for modelsim. Please read readme file firstly.
Platform: | Size: 20480 | Author: rar | Hits:

[ARM-PowerPC-ColdFire-MIPS] sdram_samsung

Description: 三星SDRAM的verilog模型的完整源码-Verilog model of Samsung SDRAM complete source
Platform: | Size: 15360 | Author: liu | Hits:

[Other] sdram

Description: 在ISE开发环境下的单速率SDRAM简单读写控制器设计，用的是verilog硬件描述语言-ISE development environment in a single-rate SDRAM controller read and write simple design, using the verilog hardware description language
Platform: | Size: 157696 | Author: 小桂 | Hits:

[VHDL-FPGA-Verilog] sdram32

Description: DDR SDRAM source verilog source codes
Platform: | Size: 25600 | Author: sachin | Hits:
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